Conventional metal oxide semiconductor field effect transistors (MOSFETs) have a single control gate on a planar substrate. Single control of the channel often leads to undesired leakage current between the source and drain when the transistor is intended to be non-conductive. This becomes especially problematic as the critical dimensions of integrated circuits continue to decrease.
An improved planar structure employs two gates, one on each side of the channel. As this arrangement increases the electrostatic coupling between the gates and the channel, the drive current of the transistor is increased and the leakage current is decreased. Unfortunately, however, such planar double gate devices are difficult to manufacture.
One mode of operation of a double-gate FET is to switch the two gates simultaneously. Another use of the two gates is to switch only one gate and apply a bias to the second gate to dynamically alter the threshold voltage of the FET. This mode of operation is commonly called back-gate. Advantageously, the performance of a backgated chip can be fine tuned either dynamically or after manufacturing.
Backgated devices offer interesting improvements to device technology as the devices are scaled down. For metal gate devices, threshold voltage adjustment by doping results in buried layer devices. Backgated devices can be used to adjust the threshold voltage without creating buried layer devices.
Threshold voltage adjustment can also be achieved for fully depleted thin silicon devices by conventional doping. However, increased impurity scattering by additional dopants may cause a significant degradation in mobility and drive current.
FinFETs are an attractive alternative to planar double gated devices because FinFETs are much easier to manufacture. The body of a FinFET is formed from a vertical semiconductor structure, generally referred to as a “fin”, that acts as a channel. A poly-Si layer may be deposited over the fin and patterned to form perfectly aligned gates straddling the fin. The fin terminates on both sides at the source and drain. Among the many advantages offered by FinFETs is better gate control at short gate lengths. FinFETs thus facilitate scaling of CMOS dimensions while maintaining an acceptable performance.
When gates are formed on both sides of the fin as described above, the device is generally referred to as a double gate FinFET. Use of a double gate suppresses short channel effects (SCE), provides for lower leakage, and provides for improved switching behavior.
The FinFET fabrication process can be modified to convert double gate FinFETs into backgated devices. One modification involves oxide thickness. In backgated devices, it is typically preferable to have a thicker oxide in the back-gate (i.e., the biased nonswitching gate) than in the front-gate to minimize front-gate to back-gate capacitance and source/drain to back-gate capacitance.
Oxides having different thicknesses may be grown on two sides of the fin of a FinFET when the fin is formed with a sidewall image transfer (SIT) process. However, growing two different thicknesses in the SIT process has shortcomings. For example, the oxide may be damaged during etching of a dummy gate or during reactive ion etching (RIE) of the opposite side of a fin, which are integral steps of the SIT process. Also, if the fin is produced using a process other than SIT, a different method for obtaining multiple oxide thicknesses is needed.
The invention is directed to overcoming one or more of the problems as set forth above.